verible
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`define alignment
Test case
`define REG_ID_BITS 31:0
`define REG_ID_WIDTH 32
`define REG_ID_DEFAULT 32'h0000DA02
`define REG_ID_ADDR 32'h0
`define REG_VERSION_BITS 31:0
`define REG_VERSION_WIDTH 32
`define REG_VERSION_DEFAULT 32'h1
`define REG_VERSION_ADDR 32'h4
I have also tried formatting with all arguments set to align
--assignment_statement_alignment align --case_items_alignment align --class_member_variable_alignment align --distribution_items_alignment align --enum_assignment_statement_alignment align --expand_coverpoints align --formal_parameters_alignment align --module_net_variable_alignment align --named_parameter_alignment align --named_port_alignment align --port_declarations_alignment align --struct_union_members_alignment align
Actual output
`define REG_ID_BITS 31:0
`define REG_ID_WIDTH 32
`define REG_ID_DEFAULT 32'h0000DA02
`define REG_ID_ADDR 32'h0
`define REG_VERSION_BITS 31:0
`define REG_VERSION_WIDTH 32
`define REG_VERSION_DEFAULT 32'h1
`define REG_VERSION_ADDR 32'h4
Expected or suggested output
`define REG_ID_BITS 31:0
`define REG_ID_WIDTH 32
`define REG_ID_DEFAULT 32'h0000DA02
`define REG_ID_ADDR 32'h0
`define REG_VERSION_BITS 31:0
`define REG_VERSION_WIDTH 32
`define REG_VERSION_DEFAULT 32'h1
`define REG_VERSION_ADDR 32'h4
I'm not sure what kind of alignment will be the best, but I think at least alignment is useful for multiple lines define.
Good idea. I think macro defines are currently not considered in the the alignment decisions. Currently, Verible is maintained by Volunteers with limited time, so if you send a pull request to add, this might be the fastest way to get this feature in.