formatter thinks always @( * ) gets lexically different output

[bensampson5]

verible_verilog_format thinks there are lexical differences between output and input when always @* statement has whitespace inside the parentheses (i.e. always @( * ) vs always @(*)). Whitespace shouldn't matter here.

Test case

module inv (
    input  logic a,
    output logic b
);

    always @( * ) begin
        b = ~a;
    end

endmodule

No options or configurations. verible_verilog_format test_case.sv

Actual output

module inv (
    input  logic a,
    output logic b
);

    always @( * ) begin
        b = ~a;
    end

endmodule
test_case.sv: Formatted output is lexically different from the input.    Please file a bug.  Details:
Mismatch in token sequence lengths: 26 vs. 24
Mismatched token enums.  got: ('(') (#40: "(") vs. ('*') (#42: "(*)")
First mismatched token [14]: ('(') (#40: "(") vs. ('*') (#42: "(*)")
; problematic formatter output is
module inv (
    input  logic a,
    output logic b
);

  always @(*) begin
    b = ~a;
  end

endmodule
<<EOF>>