Bug with returning array from function

[sifferman]

module MultiDimHierPath9 (
    input logic [3:0] a,
    input logic [3:0] b,
    output logic [1:0][3:0] out
);

    typedef logic [3:0] logic4;

    function automatic logic4 [1:0] f(logic4 a, logic4 b);
        logic4 [1:0] out;
        out[0] = a;
        out[1] = b;
        return out;
    endfunction

    logic4 [1:0] vector2x4;
    assign vector2x4 = f(a, b);

    assign out = vector2x4;

endmodule

// Generated by Synlig (alaindargelas/synlig, stable_rs, 556928db)
module MultiDimHierPath9(a, b, out);
  input [3:0] a;
  wire [3:0] a;
  input [3:0] b;
  wire [3:0] b;
  wire [3:0] \f$func$MultiDimHierPath9.sv:18$2.a ;
  wire [3:0] \f$func$MultiDimHierPath9.sv:18$2.b ;
  output [7:0] out;
  wire [7:0] out;
  wire [7:0] vector2x4;
  assign \f$func$MultiDimHierPath9.sv:18$2.a  = 4'hx;
  assign \f$func$MultiDimHierPath9.sv:18$2.b  = 4'hx;
  assign out = { 6'h00, b[0], a[0] };
  assign vector2x4 = { 6'h00, b[0], a[0] };
endmodule

// Generated by Cadence Genus(TM) Synthesis Solution 20.11-s111_1
module MultiDimHierPath9(a, b, \out[0] , \out[1] );
  input [3:0] a, b;
  output [3:0] \out[0] , \out[1] ;
  wire [3:0] a, b;
  wire [3:0] \out[0] , \out[1] ;
  assign \out[1] [0] = b[0];
  assign \out[1] [1] = b[1];
  assign \out[1] [2] = b[2];
  assign \out[1] [3] = b[3];
  assign \out[0] [0] = a[0];
  assign \out[0] [1] = a[1];
  assign \out[0] [2] = a[2];
  assign \out[0] [3] = a[3];
endmodule

Originally posted by @sifferman in https://github.com/chipsalliance/synlig/issues/2125#issuecomment-1847780545