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chipsalliance
where is the Constraint file?
Hello, defaultFPGA has 951 I/O in vivado but no constraint file. How do I assign I/O? I/O names are very different with certain FPGAs.
The I/O pins can be configured in the Scala source code under fpga-shells/src/main/scala/shell/xilinx/. You may need to use sifive/freedom or ucb-bar/chipyard for fpga prototyping!
