Spaces not properly parsed in XDC files

[WhiteNinjaZ]

@acomodi I have noticed an odd edge case with the parsing of XDC files, particularly XDC files that contain extra spaces in dictionary parameters. For example, if I run the following through the tool chain everything works just fine:

## Switches
set_property -dict { PACKAGE_PIN A8 IOSTANDARD LVCMOS33 } [get_ports { sw[0] }]; 
set_property -dict { PACKAGE_PIN C11 IOSTANDARD LVCMOS33 } [get_ports { sw[1] }];
set_property -dict { PACKAGE_PIN C10 IOSTANDARD LVCMOS33 } [get_ports { sw[2] }];
set_property -dict { PACKAGE_PIN A10 IOSTANDARD LVCMOS33 } [get_ports { sw[3] }];

## LEDs
set_property -dict { PACKAGE_PIN H5     IOSTANDARD LVCMOS33 } [get_ports { led[0] }]; 
set_property -dict { PACKAGE_PIN J5     IOSTANDARD LVCMOS33 } [get_ports { led[1] }]; 
set_property -dict { PACKAGE_PIN T9     IOSTANDARD LVCMOS33 } [get_ports { led[2] }];
set_property -dict { PACKAGE_PIN F6     IOSTANDARD LVCMOS33 } [get_ports { led[3] }];
set_property -dict { PACKAGE_PIN G6     IOSTANDARD LVCMOS33 } [get_ports { led[4] }];

However, if I simply add two or more spaces between PIN and IOSTANDARD to the first four dictionary parameters I get an error from symbiflow_synth. For example, the following XDC generates an ERROR: Invalid number of dict parameters: 7

## Switches
set_property -dict { PACKAGE_PIN A8     IOSTANDARD LVCMOS33 } [get_ports { sw[0] }]; 
set_property -dict { PACKAGE_PIN C11    IOSTANDARD LVCMOS33 } [get_ports { sw[1] }];
set_property -dict { PACKAGE_PIN C10    IOSTANDARD LVCMOS33 } [get_ports { sw[2] }];
set_property -dict { PACKAGE_PIN A10    IOSTANDARD LVCMOS33 } [get_ports { sw[3] }];

## LEDs
set_property -dict { PACKAGE_PIN H5     IOSTANDARD LVCMOS33 } [get_ports { led[0] }]; 
set_property -dict { PACKAGE_PIN J5     IOSTANDARD LVCMOS33 } [get_ports { led[1] }]; 
set_property -dict { PACKAGE_PIN T9     IOSTANDARD LVCMOS33 } [get_ports { led[2] }]; 
set_property -dict { PACKAGE_PIN F6     IOSTANDARD LVCMOS33 } [get_ports { led[3] }];
set_property -dict { PACKAGE_PIN G6     IOSTANDARD LVCMOS33 } [get_ports { led[4] }];

I am befuddled as to why symbiflow allows extra white space in some areas but not in others. Both example 1 and 2 have extra spaces between the PIN and IOSTANDARDS. The only difference is that example 2 contains extra white space on the first few constraints? I also find this lack of support for extra spaces between PIN and IOSTANDARD to be problematic since several provided master XDC files from FPGA manufacturers contain extra white space to improve readability. Many commercial XDC parsers support extra white space as well, and not supporting the feature is sure to cause confusion to new users.

[acomodi]

Hi @WhiteNinjaZ, thanks for filing this. I believe this can be due to a bug in the XDC yosys plugin, causing the behaviour you see.