OneHotEnum: a ChiselEnum with one-hot encoding

[kammoh]

Synthesis tools usually can infer the optimal encoding for a finite state machine (FSM) described in SystemVerilog or VHDL. However, this does not seem to be the case for the SV generated by Chisel/firtool. In certain designs, especially with a larger state, the state equality checks can increase the critical path delay.

This PR adds a new ChiselEnum subclass named OneHotEnum with explicit one-hot encoding and optimized value checks (a new.is and also the existing .isOneOf).

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[kammoh]

Binary incompatibility is due to the change in isOneOf signature. isOneOf is moved to Type and now expects the same Type as arguments. I think this is definitely better, but I'm open to rolling back to EnumType if that's desired (and also actually solves the issue).

[carlosedp]

I've implemented a similar feature here a long time ago: https://github.com/chipsalliance/chisel/pull/2261 Maybe can be useful.

[kammoh]

I've implemented a similar feature here a long time ago: #2261 Maybe can be useful.

Hi Carlos, Sorry I should have searched through the PRs before submitting. Your PR looks great. I like the ChiselEnum1H naming too.

This is certainly very useful feature and, from my own experience, it can help with the timing of many designs. I wonder if we can get some feedback from @jackkoenig, @seldridge, and @sequencer.