Chick Markley

I will continue poking around, and I certainly understand you are busy. When you get chance can you consider these questions. - First off, is there problems here that are...

I think they can but the goal here is to make it possible to run some existing rocket designs without having to change code (or change it too much)

Do you have fst files that you would like to be able to process? I looked through the appendix and it seem comprehensible, but a bit elaborate with the database...

Sounds good to me.

@ekiwi can you provide, or point me to, an example module and test?

Is this just mean changing `Forms.LowFormOptimized` to `Forms.LowForm` in `PrepareAst`

MIght as well add this in too. Treadle's transformations should be idempotent. Which it is not right now, the Augment printf will keep adding registers in between the clock, enable,...

I think the first part of the answer is yes. You can put as much logic in the clockChange method as you would like. It would be relatively simple I...

This has come up before, seems like an ok idea. [SAIF spec, just for reference](https://link.springer.com/content/pdf/bbm%3A978-1-4614-4271-4%2F1.pdf) Chiseltest relies on the backend to write the VCD, I don't think verilator will write...

Rendering the putative machine friendly source information would be a good addition to the IntelliJ firrtl plugin