chevillotn

Clock generator is not accurate due to simulator time resolution

2

In modelsim (and potentially others) time resolution is limited to ns or ps. In my case i want to generate a 5.12GHz clock which has a period of 195.3125ps. The...

Questasim stuck in endless loop when more python code is added

27

I'm improving my testbench more and more hence adding more code, i.e. triggers and so on on different signals. I reach a point where the simulation is completely stuck at...

Array of std_logic (VHDL) is seen as LogicArrayObject: cannot drive single bit using Clock (or other)

7

Using cocotb v1.9.2 i was able to drive single bit of an std_logic_vector using for example Clock class. This no longer works in cocotb v2.0.1 Instead of using std_logic_vedctor which...