chegbeli

Hi @nunojsa, That is the plan. I was using the draft request to iron out any codding style errors or any other fails that might come up on our end....

V2. Rewrote most of the code to fix both coding style and functionality of the driver.

V3 Implemented all the suggestions: - All macros start with ADE9078_ - Implemented AD9078_CHANNELS_PER_PHASE define - Clarified spi_read/write for 16bit register access - Switched to volatile_reg and removed the IRQ...

I've implemented most of the changes (2 remaining changes) you suggested but in the process I found some bugs which will take some time to hash out. The only two...

V1 -> V2 - replaced 0xFFFF with GENMASK() - rewritten ad_pulsar_reg_access to a simpler form - reading ref_clk_rate during probe - replaced ref_clk in the device struct with ref_clk_rate -...

V2 -> V3 - dt-bindings: - fixed redundant new lines for some descriptions - using spi-peripheral-props.yaml - added "adi" prefix to driver specific properties - created if condition for channels...

I had to rebase the branch to master to solve some conflicts in Kconfig.adi

Fixed all the check_patch errors

V3 -> V4 - replaced ret

I'll remove the Xilinx platform as it is not officially supported yet.