Xu, Zefan
Xu, Zefan
您好，感谢您的 Issue。 目前，香山本体采用“木兰宽松版第二版”（MulanPSL v2）协议发布，但文档采用“知识共享-署名 4.0”（CC-BY 4.0）协议发布。我们随后会修复木兰宽松版第二版的链接。
Wait for NEMU update.
我们目前没有还没有提供用于 FPGA 平台的 openSBI 工作负载的构造教程。您可结合面向软件仿真平台的基于 openSBI 的工作负载构造教程和面向 FPGA 的基于 riscv-pk 的工作负载构造教程来构造您需要的工作负载。 造成内核没有输出或卡死的可能性很多，包括但不限于设备树配置、启动参数、硬件缺陷等，可能还需要进一步观察。 另外，FPGA 平台使用的 UART 模块貌似是 ns16550/8250 兼容的，openSBI 里有对 8250 UART 的支持，大概不需要额外的代码修改。 Currently, there is no tutorial for building openSBI...
You have to provide an linker script file to linker/compiler, which will tell the linker where to put those sections. You could refer to [OpenXiangShan/nexus-am](https://github.com/OpenXiangShan/nexus-am) for details of building baremental...
`make ARCH=riscv64-xs` calls `make` (an GNU build tool) to build the software according to the `Makefile` file. You may search "Makefile" on the Internet, and read the `Makefile` file in...
This invalid opcode message is come from [NEMU](https://github.com/OpenXiangShan/NEMU), the golden reference model of XiangShan. You may modify the NEMU to support your new instruction, or just add `--no-diff` argument to...
> Another question is which .scala file call class Alu in Alu.scala file? I cannot find it to trace the mentioned error message... I think it's here. https://github.com/OpenXiangShan/XiangShan/blob/c2ce03f70f78cf3e4a3588a9396eaf9b67952cd9/src/main/scala/xiangshan/backend/fu/FuConfig.scala#L297-L307 And this...
`make verilog` 和 `make emu` 两个步骤的目标不同，前者生成用于综合的 Verilog 代码，后者生成用于仿真的可执行文件。两者没有流程上的关联，不共用同一套 Verilog。 如果您想针对 `XSNoCTopConfig` 这个 config 进行软件仿真，请直接在 `make emu` 时加入 `CONFIG=XSNoCTopConfig` 参数。 `make verilog` and `make emu` has different target. `make verilog` is...
> 我使用make emu CONFIG=XSNoCTopConfig MFC=1生成的仿真文件进行仿真后，波形中的代码与make verilog CONFIG=XSNoCTopConfig MFC=1生成的代码(build/rtl/路径下的代码)不一致？请问这是合理的吗？ > > After emulation using the emulation file generated by make emu CONFIG=XSNoCTopConfig MFC=1, The code in the waveform is not consistent...
> Again I make verilog and problem fixed. Is it neccesary each time we change code, both make verilog and then make emu? No, I think `make emu` is enough......