cclienti

Hello, The regression is due to the commit: **feat: new directive "retries" for annotating the number of times a job shall be restarted after a failure (#1649)** c8d81d03de2885d5d0473084141e9f6abc5de445 If I...

Hello, any news to integrate the pandas work to support the tz in type_for_alias at the pyarrow level?

The generated thrift parquet in fastparquet seems to mention also such deprecated field. But I wonder why they moved from min to min_value. I looked in their JIRA projects but...

Hello, I got the same issue. At the moment I'm forced to dynamically patch (monkey patch) the wrap_fn to force `follow_redirects=True`. I'm considering to propose a pull request based on...

In my opinion, a clean solution would be to remove the parameter `follow_redirects: bool = False` in the `propfind` method as I presented previously. By doing so, the user is...

You need to specify the type for the I/O in your module. The parser cannot guess if you want wire/reg/logic ... ```verilog module bin2therm #( parameter REG_OUTPUT = 0, //...

It is more complex than that. The default type relies on the one declared with the `default_nettype directive. I personally consider that relying on the default net type is a...

The past-as-signal shoud be removed or merge with past-as-logic that does the same. At the beginning past-as-signal was looking the IO direction to infer the net type (reg or wire)....

It makes sense. I will implement your proposition.