marss-riscv
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bucaps
TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
Hello, I'm trying to execute maddpg https://github.com/shariqiqbal2810/maddpg-pytorch on an architecture simulator. So, I'm looking around for various applications. I wanted to ask if I can simulate maddpg on marss? Note:...
Hello, Does marss-riscv support multiple execution threads in the same time domain as SystemC. For instance, can I add a custom peripheral counter that increments every 1ms and then let...
Am trying to simulate the external memory and the accelerator in the same system is there any limitation?
in the src/riscv_cpu.c file case 0xc00: /* ucycle */ case 0xc02: /* uinstret */ { uint32_t counteren; if (s->priv < PRV_M) { if (s->priv < PRV_S) counteren = s->scounteren; else...
