Baofeng(Tim) Tian
Baofeng(Tim) Tian
> Thanks, Seppo, that's will be helpful, I roughly went through MFCC design(outside), it is complexed, since our design is low power, there should have some tradeoffs. Do we have...
@dbaluta @iuliana-prodan , could you help check from IPC3 side? as this change only have impact on IPC3 and I don't have a way to check.
> Will try to have a look this week. Any progress? @dbaluta , this DRAFT patch try to remove each module's ctx dependency for further one logging interface. And since...
@abonislawski , could you list here how you get each component cpc data? by below ways? 1. cpc = avg. 2. cpc = avg * 110% 3. cpc = avg...
> > @lgirdwood @abonislawski , I have a comment on clock adjust: it should only need be enabled on release build, and keep debug build as always MAX clock. >...
Another benefit for remove clock control for debug build: whenever glitch or discontinue issue happened, we can have a try on debug build directly, if no issue, it is CPC...
> My comments have been addressed, so marking this as good to go. > > @btian1 comment w.r.t. how we handle debug build with asserts is an interesting one. There...
> @btian1 wrote: > > > @kv2019i wrote: > > > @btian1 comment w.r.t. how we handle debug build with asserts is an interesting one. There is no question asserts...
> Can you please try to address at least some of the checkpatch.pl errors: > > for example this: > > ``` > WARNING: macros should not use a trailing...
> @btian1 Please let me know when the patches are in a final form and will try to give them a test > @btian1 Please let me know when the...