chenglin.bi
chenglin.bi
> The issue here is that IPSCCP is using PredicateInfo to propagate conditional information. PredicateInfo only tracks information in blocks dominated by the true & false blocks of the branch....
It looks PredicateInfo doesn't support update dynamic also. No easy way to make it work.
Trying to add some test code here https://github.com/bcl5980/llvm-project/tree/perf/ipsccp-loop A lot of compile time increase but got a little performance gain on SPEC2017, so maybe we need to find some other...
Try loop runipsccp to a fix point: The loop count statistcs is here: External/S...6.blender_r/526.blender_r.test 518.00 External/S...lancbmk_r/523.xalancbmk_r.test 230.00 External/S...lancbmk_s/623.xalancbmk_s.test 230.00 External/S...510.parest_r/510.parest_r.test 176.00 MultiSourc...marks/7zip/7zip-benchmark.test 157.00 External/S...0.omnetpp_s/620.omnetpp_s.test 153.00 External/S...0.omnetpp_r/520.omnetpp_r.test 153.00 External/S...8.imagick_s/638.imagick_s.test 74.00 External/S...8.imagick_r/538.imagick_r.test...
> > Try loop runipsccp to a fix point: The loop count statistcs is here: > > Is that the number of times we re-run IPSCCP? It may be interesting...
arm_aapcscc is unsupported calling convention on aarch64. I guess this should not be a valid issue.
Candidate patch: https://reviews.llvm.org/D136014
https://godbolt.org/z/8zqqz58rz A better case opt can't optimize it. ``` define i64 @square(ptr %p, i64 %i) { %lshr = lshr i64 %i, 3 %and = and i64 %lshr, 65535 %pidx =...
Candidate patch: https://reviews.llvm.org/D135982
x86 is also the same: ``` f: # @f sar eax, 3 imul eax, eax ret ```