Anup Patel

Results 67 comments of Anup Patel

All three per-CPU stack, per-CPU scratch, and system wide heap are scaled at boot time based on the number of CPUs. This allows us to use the same FW binary...

List of things required for APEI/CPER are: * RAS Local IRQs which already standardized/ratified by AIA spec. * RAS Non-maskable interrupts defined by RNMI spec which is in final stages....

@dhaval-rivos We can always do APEI related ECRs incrementally. The first set of APEI related ECRs can be very basic having no dependency on HW specs.

We have one IMSIC next to each HART. The Linux IMSIC driver treats M interrupt IDs on each HART as separate MSI vector so for N HARTs we have NxM...

Existing interrupt service routines of various Linux drivers work fine without any change.

I believe this is already taken care hence closing.

Can you try to following changes and see if it works ? ``` diff --git a/scripts/create-binary-archive.sh b/scripts/create-binary-archive.sh index 9d56f2f4..a07a57b5 100755 --- a/scripts/create-binary-archive.sh +++ b/scripts/create-binary-archive.sh @@ -117,6 +117,7 @@ build_opensbi() {...

> This is a deeper problem with the OpenSBI build system. The underlying issue that build artifacts are shared between platforms is fixed by this patch: https://patchwork.ozlabs.org/project/opensbi/patch/[email protected]/ I agree with...

I have updated the release tarball for v1.6 (https://github.com/riscv-software-src/opensbi/releases/tag/v1.6) Please check at your end.

Platform vendors can also keep separate defconfig for such things in their fork of OpenSBI repo.