Andrew Waterman

CLZ32 overlap with CLZ[W] in Zbb

4

The CLZ32 P instruction performs the same function as CLZ[W] in Zbb. My recommendation is to remove the existing CLZ32 from P, then add CLZ[W] to P. (It's OK for...

BITREV[I] partially overlaps REV (GREVI) in Zbp

2

BITREV[I] is equivalent to REV followed by a shift. This operation is useful for bit-reversed addressing, but the question is whether the savings is important enough to justify the additional,...

BPICK overlap with CMIX in Zbt

5

These instructions perform the same function. Zbt is not yet frozen, so the resolution is somewhat arbitrary: we can delete either instruction, then add the other instruction to both P...

MINW/MAXW overlap with MIN/MAX in Zbb

43

MINW/MAXW perform the same function as MIN/MAX. My recommendation is to remove MINW/MAXW from P, then add MIN/MAX to P. (MIN/MAX would then belong to both P and Zbb.)

RV32 vs. RV64 strategy for register-pair instructions

1

In the current design, some opcodes (e.g. KADD64) are defined to operate on 64 bits: i.e., a register pair in RV32, or a single register in RV64. This seems awkward...

This is a placeholder for the issue discussed in #584, and for the broader topic of which behaviors are allowed when reserved encodings are used. There is an interaction with...

Add draft of Svukte extension

7

Svkt provides a means to make user-mode accesses to supervisor memory raise page faults in constant time, mitigating attacks that attempt to discover the supervisor software's address-space layout. I plan...

This matches ACLINT (and other vendor-specific CLINTs).

Not yet frozen, but in a pretty stable state. See https://github.com/riscv/riscv-dot-product