riscv-p-spec
riscv-p-spec copied to clipboard
riscv
MINW/MAXW overlap with MIN/MAX in Zbb
MINW/MAXW perform the same function as MIN/MAX.
My recommendation is to remove MINW/MAXW from P, then add MIN/MAX to P. (MIN/MAX would then belong to both P and Zbb.)
MINW/MAXW only overlaps with MIN/MAX on RV32, not on RV64. Do you suggest that
- We add MIN/MAX to P, and remove MINW/MAXW on RV32.
- We keep MINW/MAXW, and also add MIN/MAX to P on RV64.
Most of RVP overlaps on RVB has this property that they only overlap either with RV32 or RV64, but not both. Do you have a general solution/idea for how to handling this kind of instruction overlaps?
As a general recommendation, I would err on the side of avoiding redundant instruction encodings for a given base ISA: i.e., favor the first option.
(Of course, there might be specific cases where it makes sense to contravene that recommendation.)