Konsta M

icon indicating a website link https://stackoverflow.com/users/8063451/am9417 icon indicating an email [email protected]

icon company Vaasan Yliopisto / University of Vaasa icon location Vaasa, Finland icon location SW Developer / FPGA Engineer, M.Sc. in Electrical Engineering. Mainly Java & C# stuff in Github. Also FPGA for now: (System)Verilog, VHDL.

Results 2 issues of Konsta M

Unable to use Modelsim linter

1 comment

**Describe the bug** Setting linter to Modelsim fails. It gives the following errors in "Problems console": > Execution of vlib.exe failed. Please check the error log for more details.TerosHDL: modelsim(vcom-66)...

bug

"PORT" in the beginning of a VHDL generic name messes up the formatting with Standalone formatter

**Describe the bug** If there's a generic that has a string "PORT" in the identifier (e.g. "PORT_COUNT"), running the VHDL formatter with Standalone formatter breaks the file **To Reproduce** Format...

bug