Anton Kirilov

@bnjbvr @cfallin @fitzgen Is this issue still relevant? It affects the tests in `tests/all/traps.rs` in particular.

FYI recently I did a little investigation for my back-edge CFI work, and the only remaining user I could find of the `backtrace` crate, and by extension the system unwinder,...

Concerning the Arm architecture, Arm has published [documentation](https://developer.arm.com/Arm%20Security%20Center/Speculative%20Processor%20Vulnerability) on the various speculative execution vulnerabilities. Unfortunately the hardware CFI techniques that are discussed by the RFC proposal mentioned above do not...

Recently I have done a little bit of research on Spectre-V2, and my conclusion is that on AArch64 the only efficient mitigation (so I exclude techniques such as retpolines) is...

Backends [actually](https://github.com/bytecodealliance/wasmtime/blob/a47a82d2e5a7a76de158480e5c6b9dca62ebeeab/cranelift/codegen/src/isa/aarch64/lower_inst.rs#L1616) [never](https://github.com/bytecodealliance/wasmtime/blob/a47a82d2e5a7a76de158480e5c6b9dca62ebeeab/cranelift/codegen/src/isa/s390x/lower.rs#L242) [see](https://github.com/bytecodealliance/wasmtime/blob/a47a82d2e5a7a76de158480e5c6b9dca62ebeeab/cranelift/codegen/src/isa/x64/lower.rs#L2816) the `iadd_imm` instruction. Looking at the operation [definition](https://github.com/bytecodealliance/wasmtime/blob/a47a82d2e5a7a76de158480e5c6b9dca62ebeeab/cranelift/codegen/meta/src/shared/instructions.rs#L2047), an issue that springs to me straight away is that the operation is defined for `I128`, but the...

My point is that the behaviour should be specified explicitly, and yes, I agree that sign-extending makes the most sense.

As I stated in the linked issue, IMHO the CLIF instruction definition should be updated.

@cfallin I have an upcoming patch that moves the `AMode` enum definition to ISLE, but I don't plan to touch the actual lowering rules for loads and stores. We already...

I have a somewhat related question - now that PR #3606 has been merged, on AArch64 we have to be careful whenever return addresses are moved from registers to memory,...

Note that the `region` crate lacks support for BTI (reported in darfink/region-rs#21), so I have used a work-around - a direct call to `libc::mprotect()`.