Muhammad Zain

The tests are working fine on Sail. I also used lockstepverbose and $display to observe the signals. Lockstepverbose shows that an instruction fetch exception occured, but the signals for the...

@rosethompson I looked at your recommended changes in WallyTracer. The only one that worked was changing SelHPTW to ~GatedStallW only for the memory stage. It fixed the issue for sv48,...

[sv32_invalid_pte_test.elf.gz](https://github.com/user-attachments/files/20928644/sv32_invalid_pte_test.elf.gz) [sv48_reserved_rwx_test.elf.gz](https://github.com/user-attachments/files/20928643/sv48_reserved_rwx_test.elf.gz)

Fixed with PR #1497

In order to **recreate** this, place the test `"rv64i_m/vm_sv48/src/sv48_pte_reserved_field_S_mode.S"` prior to `"rv64i_m/vm_sv48/src/sv48_res_global_pte_U_mode.S"` in `tests.vh` and run the following command. `wsim --sim questa rv64gc arch64vm_sv48`