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Xilinx
Xilinx Embedded Software (embeddedsw) Development
TWI mode implemented. Solution of #107 This version is backward compatible with [origin](https://github.com/Xilinx/embeddedsw/tree/920eed79b3fdf1a638ab4a9dbe264bbde5f0c6bd). The [TWI](https://en.wikipedia.org/wiki/Serial_Peripheral_Interface#Three-wire_serial_buses) is the half duplex variant of the SPI, where the MOSI and the MISO is...
Fixed problem described in issue #105 which prevents compilation under clang.
The function XSpiPs_PolledTransfer checks the transfer completion by testing the flag XSPIPS_IXR_TXOW_MASK, which is reported to be the flag indicating the TX FIFO overwater, meant to be asserted whenever the...
The fix in commit https://github.com/Xilinx/embeddedsw/commit/0976d41408dfc4f4cd2be174269fe1ef61176792 changed the behavior of Xil_DCacheInvalidateRange in a way that may or may not have been your intention. Previously, the cortexr5 function performed a flush (clean...
The IPI interrupt handler does not pass the interrupt status to the receive handler and clears it before the receive handler is called. So the receive handler cannot know the...
https://github.com/Xilinx/embeddedsw/blob/8fca1ac929453ba06613b5417141483b4c2d8cf3/XilinxProcessorIPLib/drivers/rfdc/examples/xrfdc_clk.c#L514 This code that should issue a FCAL_EN command is not quite right per the documentation for the LMX2594, something like: `tx_array[2] = (unsigned char) ((r[112]) & (0xFF)) | (1
https://github.com/Xilinx/embeddedsw/blob/8fca1ac929453ba06613b5417141483b4c2d8cf3/XilinxProcessorIPLib/drivers/spi/src/xspi.c#L627C1-L650C3 I discover that the var `RemainingBytes` is unsigned int，so if my tansfer data bytes is not the times of `DataWidth` , it will fill the fifo untill it's full....
hi. working at 2021.2 mpsoc ultrasacle+ i disabled all ultrascal+ mpsoc Bluetooth drivers at kernel(as far as i am concerned). still at shown Starting bluetooth: bluetoothd. how to turn it...
Referring to the following issues and the following error using fsbl code with sd cards: * https://support.xilinx.com/s/question/0D52E00006hpiTJSAY/high-speed-sd-card-cant-finish-initialization-during-fbsl-and-uboot?language=en_US * https://support.xilinx.com/s/question/0D52E00006hpTekSAE/zynq-fsbl-cannot-read-bootbin-from-sd-card?language=en_US ``` Boot mode is SD SD: rc= 0 SD: Unable to...
https://github.com/Xilinx/embeddedsw/blob/8fca1ac929453ba06613b5417141483b4c2d8cf3/lib/bsp/standalone/src/arm/cortexa9/xil_cache.c#L352-L359 there is the `#ifdef USE_AMP` inside the `while` loop which means, that it is an endless loop. My suggestion would be to include the `while` "header" inside the `#ifdef`...
