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XIpiPs_IntrHandler does not pass interrupt status to receive handler
The IPI interrupt handler does not pass the interrupt status to the receive handler and clears it before the receive handler is called. So the receive handler cannot know the source CPU which seems like an oversight.
Also by clearing the status before calling the handler the indicates that the message has been processed before it actually has, so it could be overwritten before the handler completes.
https://github.com/Xilinx/embeddedsw/blob/8fca1ac929453ba06613b5417141483b4c2d8cf3/lib/sw_services/xilmailbox/src/PS/xilmailbox_ipips.c#L371C2-L371C2
This seems like a missout we will work on it and push the patch.