embeddedsw
embeddedsw copied to clipboard
Xilinx Embedded Software (embeddedsw) Development
- Situation: - adds uartps to hw design (but uartps is not a debug channel for the developer) - select another uart(ns16550) for STDIN and STDOUT in BSP(for fsbl) setting....
I'm trying to understand how to properly use the function `XUsbPsu_EpBufferSend()` with Isochronous endpoints to send multiple packets per microframe. The USB spec says that High Speed and Super Speed...
Bug injected in commit: a4acb9ecba683b6d7cb3d251bfb8c3ee832935c1 Hi, During a project update, we have observe major drop of data on a master AXI QSPI IP (single lane) due to an incomplete fix...
In PG210 V4.1, it is mentioned that USER_REG_0 address has been updated from 0x0184 to 0x0134 starting from v2.3, but it is still at 0x0184 in file 'xxxvethernet_hw.h' on master...
1.Run xxxve Ethernet_ example_ intr_ Mcdma. c driver code problem Can't jump out of while (! FramesTx);
In xfsbl_debug.h, line 70 https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_apps/zynqmp_fsbl/src/xfsbl_debug.h#L70 : ``` #define XFsbl_Printf(DebugType,...) \ if(((DebugType) & XFsblDbgCurrentTypes)!=XFSBL_SUCCESS) {xil_printf (__VA_ARGS__); } ``` `XFSBL_SUCCESS` is defined in xfsbl_error.h but it is not included in xfsbl_debug.h.
The handler with XUARTPS_EVENT_RECV_ORERR set to the event never occurs. The only way to detect receive overrun is from XUARTPS_EVENT_RECV_ERROR, would be to read last errors as in the comment...
The freertos10_xilinx.tcl script that generates FreeRTOSConfig.h file doesn't allow to override the default setting for INCLUDE_xTaskGetCurrentTaskHandle, found in FreeRTOS.h. The default value is disabled. Third party SafeFlash library from HCC...
I’m using a very simple baremetal Zynq lwIP based UDP echo server https://github.com/dnygren/zynq_echo_servers_udp/tree/master/C%2B%2B/zynq_echo_server_udp_cpp/src to test lwIP's UDP functionality. It is built using Xilinx Vivado/SDK 2018.3, standalone 6.8, along with lwIP...
I'm experiencing issue when transmitting reasonable amount of data using interrupt driven UART. In general it is working but sometimes (sporadically) it looks like missing final UART interrupt (I guess...