Luke Wren
Luke Wren
Very much a work in progress, but I wanted to open early to get feedback on the approach/direction. I'm porting/rewriting some of the missing modules from migen.genlib.cdc. Currently in this...
See #548. Details are quite messy. Our API supposedly lets you poke the UART settings whilst it's enabled, and doesn't impose restrictions on what state it can be in when...
Hope this is the right repo for this issue. This is a brand new board I got from Digikey. I was following the instructions in the [TinyFPGA BX User Guide](https://tinyfpga.com/bx/guide.html)....
Originally raised on Discord. There is generally a 1:1 relationship between the syntax inside `@asm_pio` decorators in MicroPython, and the instructions listed in the datasheet, but there are some wrinkles...
The latest draft says this about `jvt` (and this seems to match the ratified PDF from the `riscv-code-size-reduction` repo): > jvt.base is a virtual address, whenever virtual memory is enabled....
The RVM23 draft has this NOTE admonition about Zfinx: https://github.com/riscv/riscv-profiles/blob/35f286266fa69cb023b652203406cdea76960831/src/rvm23-profile.adoc?plain=1#L154-L156 Does this mean the RVM23 spec **prohibits** Zfinx, i.e. anything which implements Zfinx is not an RVM23 core? Or does...
The current RVM23 draft says: > The assumption is that if Zalrsc is implemented on a microcontroller, then Zaamo will also be implemented, so we do not make Zalrsc available...
Per title. These extensions have a significant impact on code density (static + dynamic), and the 64-bit accesses can be cracked into pairs of 32-bit accesses on low-end implementations. I...
This file: ```verilog `default_nettype none module foo; endmodule `default_nettype wire ``` Reports this error: ``` 6 | `default_nettype wire | ^^^^ hint : keyword should be followed by a single...
These are from building `kitchen_sink` with `-fanalyzer` on GCC 14.3. * Panic on failed allocation in `pico_time` * Remove `+ 1` on claim bit for second core in `multicore_doorbell_claim()` --...