sphinx-verilog-domain
sphinx-verilog-domain copied to clipboard
Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.
I'm trying to get a `Framework :: Sphinx :: Domain` PyPi classifier approved to help with the Sphinx docs as well as keep the ecosystem more organize and I need...
Hello, I don't see much active development. Just curious if development has moved elsewhere, perhaps?
https://github.com/SymbiFlow/actions/tree/main/checks
It would be nice to have a directive to describe defines, e.g. ``` .. verilog:define: SOME_DEFINE Some define is magic. ``` Since defines are global there's no need to scope...
I want to document a module (in this case, https://github.com/lowRISC/ibex/blob/master/rtl/ibex_core.sv). This module has a fair amount of ports and parameters, the current documentation can be found at https://ibex-core.readthedocs.io/en/latest/integration.html. When trying...
It looks like the type parser isn't able to parse enum types in parameter declarations. Failing rST code: ```rst .. verilog:parameter:: parameter ibex_pkg::regfile_e RegFile = RegFileFF Register file implementation select:...