Michele Caon

Improve Verilator compatibility

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# Improve Verilator compatibility This pull request applies some changes to the RTL to avoid compilation errors with Verilator. In particular: - Use explicit comparison in test statements on parameters...

[XIF] Coprocessor XIF Issue response not sampled by ID-EX pipeline registers

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## Coprocessor XIF Issue response not sampled by ID-EX pipeline registers The `cv32e40x` CPU attempts to offload an instruction to a coprocessor connected through the CORE-V eXtension Interface (XIF `issue_req`)...

## Summary The `cv32e40x` CPU attempts to offload an instruction to a coprocessor connected through the CORE-V eXtension Interface (XIF `issue_req`) whenever its instruction decoder fails to recognize it (or...