Smitashree-code

Weight Pruning on FPGA

3

I have applied sparsity API weight pruning and synthesized both pruned and unpruned models using hls4ml targeting a Xilinx FPGA. The pruned model achieved an 11% reduction in DSP48 usage,...

Vivado_hls 2019.2 synthesis error

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ERROR: [HLS 200-70] Compilation errors found: In file included from firmware/myproject.cpp:1: In file included from firmware/myproject.cpp:4: In file included from firmware/parameters.h:7: In file included from firmware/nnet_utils/nnet_code_gen.h:4: In file included from...

Hello, I am getting following error while doing pattern pruning(DSP utilization). ImportError: cannot import name 'optimize_keras_model_for_hls4ml' from 'hls4ml.optimization' (/home/smita/.local/lib/python3.10/site-packages/hls4ml/optimization/__init__.py)