Shraddha Devaiya

behavior of testbench

14

Hello, I am trying to run testbench of riscv debug module. For that, I have run command ```make veri-run```. For this it is just stopped at following flow:  Is...

Hello, I am trying to generate full_interrupt_test for multi_harts, but it is giving an compilation error: can anyone please help?

limited randomization of the arguments for the instruction

1

Hello, I have generated few tests(riscv_arithmetic_basic_test, riscv_jump_stress_test and riscv_mmu_stress_test), and observed that there is lot of repetition in generated instructions(means there are very unique arguments with the same instruction). You...

Not getting an expected output

9

Hello, I am using the pyexplainer to explain the data regarding the bug report. following is my input data : and the feature data is like this: and for this...