Chuan-Tzu Tsai
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Chuan-Tzu Tsai
Hi, I'm having some questions about the timing spec for RISC-V and OpenSBI. If I understand the spec correctly, we allow implementation to use a real timer CSR or triggers...
I was running libc-test on both musl RV32 and RV64 port and I happened to find that [math/fenv](https://repo.or.cz/libc-test.git/blob/HEAD:/src/math/fenv.c) fails due to a segmentation fault. It is caused by dereferencing FE_DFL_ENV,...