Rot127
Rot127
After https://github.com/capstone-engine/capstone/pull/2231 we could extend `cstool` to print the encoding of an instruction (for auto-sync archs). Inspiration can be taken from [Zydis](https://github.com/zyantific/zydis): 
List to track not yet implemented or faulty details of AArch64 - [x] Warning if `arm64` is passed to cstool - [x] SME vector lead/store/read/write have incorrect outs/ins set -...
We had now several times that the CI in Capstone is fine with several build warnings, but external projects are not. For `v6` or at least `v7` we should be...
Testing Capstones disassembly results is possible via too many ways. 1. Test binaries print (_but not test!_) the values of instruction detail (e.g. which operands are written and read etc.)....
Generating certain instruction attributes from the `td` files is sometimes not possible, because those attributes are simply not defined. Often those attributes are encoded in single flag bits and the...
Currently C++ template functions are translated to macros: ```c++ template void func() { return targ; } ``` becomes ```c #define DEFINE_func(targ) \ void func_##targ() { \ return targ; \ }...
Currently always the newly translated file patched and then copied to overwrite the old file. This is annoying, if only a small update is done (maybe a single `printOperand` function...
The high level documentation about Capstone is still missing in [ARCHITECTURE.md](https://github.com/capstone-engine/capstone/blob/next/docs/ARCHITECTURE.md#architecture-of-capstone)
Certain instructions disassemble differently if Coprocessors are present (also DFB). E.g. ``` 0xb4,0xec,0x04,0x85 = ldc p5, c8, [r4], #0x10 ``` Users should be able to set this. Related https://github.com/capstone-engine/capstone/issues/1992
As explained in https://github.com/capstone-engine/capstone/pull/2116 system and banked registers can sometimes not differentiated by their encoding (e.g. `2057 = psp (sysreg) = r9_fiq (bankedreg)`. `cs_reg_name()` will always return the system register...