Simon Pilgrim
Simon Pilgrim
Branched from Issue #49812 https://github.com/llvm/llvm-project/blob/6f7f5b54c81be59ec7876649d1f9aa6b104658ec/llvm/lib/Target/X86/X86InstrCompiler.td#L1761-L1770 The comment admits to the fold being unsafe, and just hopes it'll be OK - but now that we have better poison detection/handling in DAG...
| | | | --- | --- | | Bugzilla Link | [51069](https://llvm.org/bz51069) | | Version | trunk | | OS | Windows NT | | CC | @topperc,@davidbolvansky,@LebedevRI,@preames,@RKSimon,@phoebewang,@rotateright |...
CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll is failing on EXPENSIVE_CHECKS builds: ```console Command Output (stdout): -- $ ":" "RUN: at line 3" $ "e:\llvm\ninja\bin\llc.exe" "-march=amdgcn" "-mcpu=gfx900" "-amdgpu-function-calls=false" "-enable-misched=false" "-sgpr-regalloc=fast" "-vgpr-regalloc=fast" # command stderr: # After...
As noticed on #84759 - we should be able to allow folds to generally match any binary ops that are recognized by the TLI.isBinOp/isCommutativeBinOp callbacks, allowing us to match target...
Pulled out of #39822 which was a bit too general. Unlike the general ISD SRA/SRL/SHL nodes, the AVX2 vector shift nodes X86ISD VSRAV/VSRLV/VSHLV handle out of bounds shift amounts: -...
Pulled out of comment made on #80627 - to simplify further investigation into visit limits. We still need test coverage - we can either continue this patch here or @AtariDreams...
| | | | --- | --- | | Bugzilla Link | [39035](https://llvm.org/bz39035) | | Version | trunk | | OS | Windows NT | | Blocks | llvm/llvm-project#28596 |...
Always try to fold freeze(op(....)) -> op(freeze(),freeze(),freeze(),...). This patch proposes we drop the opt-in limit for opcodes that are allowed to push a freeze through the op to freeze all...
Ensure we don't expose any poison elements WIP patch to try to help with #143102 etc. - although #145939 should have a larger effect
The float/double/half scalar / vector comparison intrinsics can all be handled in constant expressions, accounting for special handling of NAN inputs. ``` _mm_comieq_ss _mm_comieq_sd _mm_comieq_sh _mm_comige_ss _mm_comige_sd _mm_comige_sh _mm_comigt_ss _mm_comigt_sd...