PRugg-Cap

Trying to revive this to make progress and summarise pros and cons (likely angering everyone involved, so sorry about that!): 1. Elevate forces you to conflate deepness between e.g. "mutability"...

@jamie-melling Agreed: I don't think this was updated with the new "CLEN and XLEN CSRs alias and are mode-dependent behaviour". Therefore, any existing RISC-V CSR is safe to access, as...

Oh yes, good point!

> The reason not to use the same encoding scheme for RV64 was to allow more combinations, so if we ban them all requiring a spin of the silicon to...

Sounds good to me!

I believe these have all been separately implemented except for https://github.com/riscv/riscv-cheri/pull/130/commits/4e48ffef6db7bf91b89be98027b21fd7cf86a0de. I think we currently plan to keep the *tdc registers.

I don't know if @sorear has any objection?

Worth mentioning that with https://github.com/riscv/riscv-cheri/pull/285, we're pretty close to being able to support this kind of thing. > For example, an RV64 CPU implementing Zcheripurecap only would be a little...