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Unable to Read Full 4959-bit Register

2

#### Description I defined a 4959-bit wide register named `coverage` in my Verilog code. However, when I try to read this register using Cocotb, I can only retrieve 2048 bits....

JSON output does not distinguish between case, casex, and casez statements

3

I'm developing a parser based on Verilator's JSON output and noticed that the generated JSON does not differentiate between case, casex, and casez statements (All display with "type":"CASE"). Environment: Verilator...