Harry Brooke

Hey @lperlaki. I know you said it isn't tested, but I was curious if you had any example code or tips on getting this working? I've had a go over...

Hello- Maybe I'm missing something, but I think I've bumped into a usecase that requires this or something like it. Threw together a quick example: ``` rust enum Things {...

some thoughts (some might say overthinking :)) mostly about how dead battery could be handled in the driver I had while writing #2683: g0 is weird: you need to write...

(and the issue with TIM1 is probably #2053)

just to check, are you sure the waker is not being woken, and not that it is being woken but returns pending again even though the event you were waiting...

> Our understanding has been that with int_busy below the hw will automatically NAK all further host request without disturbing any register until the int_fg.transfer is cleared. Which we clear...

you know… i was wondering why they removed atomics from some of the new V3 cores. might be why 🙃 ([this Exists](https://github.com/litmus-tests/litmus-tests-riscv) wrt testing atomics on riscv. never even touched...

you've probably got this down as a lost cause :) but it still strikes me as odd that they could mess this up and still advertise it as a feature,...

worth a try. i should really just find the time to repro this myself 😅. i think you are correct that a “real” preemptive scheduler would be needed to cause...

> Is there any particular blocker to merging this? I need this for embassy-boot support FYI: these chips have a Weird flash erase value of 0xe339 which isn't quite compatible...