Georg Lehmann

import host d3dadapter9.so into pressure-vessel

5

[gallium nine standalone](https://github.com/iXit/wine-nine-standalone) needs d3dadapter9.so, otherwise it will fail with ``` err:d3d9nine:common_load_d3dadapter d3dadapter9.so.1 was not found on your system. ``` Afaik pressure-vessel imports the host vulkan and gl drivers into...

Incomplete validation for buffer_reference_align.

1

https://github.com/KhronosGroup/GLSL/blob/master/extensions/ext/GLSL_EXT_buffer_reference.txt#L135 > Each buffer reference type has an alignment that can be specified via > the "buffer_reference_align" layout qualifier. This must be a power of > two and be greater...

Vulkan: enable VK_EXT_custom_border_color features

1

radv only create the border color bo if this feature is enabled, so it crashed when creating samplers with custom border colors Fixes #4072 Fixes #3993

Using fossilize master and the attached .foz, the following command causes a pipeline creation segfault in radv: `fossilize-disasm metro_part.0.foz --output frog --target isa --filter-graphics 0062066079891461` ``` Thread 1 "fossilize-disas" received...

Allow setting a load order for implicit layers

6

For explicit layers it's easy to manage the order with the `VK_INSTANCE_LAYERS` env var but currently there is no way to specify which implicit layer should be loaded first. Such...

Instruction timing currently only has "Clks normalized by wavefronts", "Clks normalized by hit count" and "Total clks" options. The second one is the most useful of them when trying to...

Looking at the instruction timing view for code using SALU floating point instructions on RDNA4, I get the impression that these instructions take 3 cycles to issue and have a...

Capture (RDNA4): https://drive.google.com/file/d/1GU39wlp73GJTLse4XEaDRM3JZQYB_F8p/view?usp=sharing This is a regression, 2.5 can successfully open the same capture. Assert: ``` RadeonGPUProfiler: /home/jenkins/workspace/llvm_build/llvm-project/llvm/tools/amdgpu-dis/CodeObjectDisassembler.cpp:960: void llvm::CodeObjectDisassembler::printSectionContents(const llvm::CodeObjectSection&, llvm::object::symbol_iterator, bool): Assertion `!Writing && "Writing immediate branch target!"'...

RGP segfault when opening capture

1

Capture (RDNA4): https://drive.google.com/file/d/1-lheJlbogR9Ae5c-IZuj0QufHgJH5F3O/view?usp=sharing Both RGP 2.4 and 2.5 linux builds crash in what seems to be the llvm disassembler: ``` #0 0x00007ffed319f118 in llvm::AMDGPUInstPrinter::printGlobalSReg64(llvm::MCInst const*, unsigned int, llvm::MCSubtargetInfo const&, llvm::raw_ostream&)...

Even when the pipeline state section says a shader uses wave64, the instruction timing view prints the shader as wave32. This can be noticed when viewing VOPC or WMMA instructions....