Gabriel Gouvine

Stuck during coarsening

5

I have an hypergraph (adaptec1 benchmark, a VLSI circuit, ~200k nodes/edges) that seems to get stuck at the coarsening phase (left it to compute overnight once). [adaptec1.hgr.gz](https://github.com/kahypar/kahypar/files/8507233/adaptec1.hgr.gz) `./KaHyPar -h adaptec1.hgr...

Open source test pattern generation

1

Atalanta is not open-source (research use only). It seems that there is no open source ATPG solution around. I've been developing one, [quaigh](https://github.com/Coloquinte/quaigh), which is mostly compatible with Atalanta (.bench...

## Summary Highs logs are not entirely captured. As discussed [on the Highs bug tracker](https://github.com/ERGO-Code/HiGHS/issues/1670), it can result in error messages like the following: ```ERROR: Output stream () closed before...

Corruption optimization is slow compared to FLL/KIP on very large designs

1

Using the greedy optimization on large designs, such as b18_1, can take more than an hour against just minutes for FLL/KIP. Find out if this can be improved.

The current Sat attack implementation uses Minisat provided by Yosys. It is quite limited compared to a more advanced Sat solver

It seems that `yosys-config` is not provided by OSS-CAD suite, so it's not possible to build with an OSS-CAD installation

We have a regression (DRC error) on the tests: [Github action](https://github.com/lip6/coriolis/actions/runs/7460742259/job/20299433804) The error is the following. Looks like an illegal instruction error: ``` Create Ring : chip_r_rng Merge Errorfiles: Merge...

The configuration process allows to set non-existing values, which is quite error prone IMO. It's very easy to write `etesian.latchupDistance` instead of `etesian.latchUpDistance`. It would be nice to error out...

Coriolis overwrites .vst input files

6

It seems that the order of iteration of `getTerminalNetlistInstanceOccurrences` can vary between similar builds. In my case, using Meltemi instead of Etesian changes cell order in Etesian (branches `determinism_etesian` and...

Currently, diode and buffer insertion is quite ad-hoc, and makes use of its own datastructures to decide where free space is available. This could all be done simply and safely...