cv-frontend-vue
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CircuitVerse
Fixes #561 #### Describe the changes you have made in this PR - 1. Added the pre condiiton logic in the verilog module 2. Made the verilog module consistent to...
Fixes #634 Describe the changes you have made in this PR - Added FIFO queue component ### Screenshots of the changes (If any) - Note: Please check **Allow edits from...
Fixes #614 #### Describe the changes you have made in this PR - Added new Serial Port Component ### Screenshots of the changes (If any) - Note: Please check **Allow...
The component implements a First-In-First-Out (FIFO) logic queue that can enqueue and dequeue bit-width-limited values on clock edges. **Characteristics:** - Supports `ENQ `(enqueue), `DEQ `(dequeue), and `RST `(reset) control signals....
- Added new responsive mobile header component. - Styled using scoped CSS and media queries. - Updated App.vue to include the header. - Helps address TODO: Create mobile version of...
Addition of the new component — Serial Port — that allows users to read/write serial data from external hardware devices (e.g., Arduino, ESP32) via the Web Serial API and feed...
Fixes #469 #### Describe the changes you have made in this PR - Replaced setTimeout in the context menu with Vue reactivity and CSS transitions to improve performance and follow...
Fixes #625 #### Describe the changes you have made in this PR - added bit extender component ### Screenshots of the changes (If any) - Note: Please check **Allow edits...
### Is there an existing issue for this? - [x] I have searched the existing issues. ### Describe the bug   - Various eslint errors while using typescript ###...
A Bit Extender increases the bit-width of a signal, usually by adding extra bits (e.g., leading zeros for unsigned or sign extension for signed numbers). We can choose extension type...