Ahmed Amr Abdellatif

Hello everyone, I was trying to use `ripes` to verify my multiplier design unit, by trying to perform a calculation that exceed 64-bit to verify the implementation of `mulh` instruction....

can't do riscv_csr_test

1

I used the DV to test my design of RV64IMC, and i worked so good. Now i want to test my machine mode csr register implementation. When i try to...

Can't do S-mode test ( No delegation )

3

Hello everyone, I've design an RV64IMAC architecture with M & S Privilege levels supported. I want to test the S-mode, I see that the assembly generated has S-mode exception handler...

How to test Atomic Extension?

3

I'm working on a GP to design a RV64IMAC, and i want to use the DV to test my design, but there's no test that generates atomic instructions, can someone...

How to connect the test to my SV design file, and How do I get the feedback that the test has passed or failed?

1

Hello everyone, I've designed an RISCV architecture and i want to test it using `RISCV-DV`. So, is there anyone can guide me what should i exactly do to test my...