6by9
6by9
> Added `link-frequency=297000000` doesn't work for 1080p@50Hz at RGB at all (tried with and without`4lane=1` with same results): > > ``` > [ 58.956154] unicam fe801000.csi: Device has requested 5...
Typo by me `i2ctransfer -f -y 10 w2@0x0f 0x00 0x06 r2@0x0f` wN = write N bytes. rN = read N bytes.
> But is it a right order?.. 4.13.3 I2C Read Access Translation Note that data transferred on the I2C bus is sent LSB first > I found that minimal value...
> > If `tc358743_num_csi_lanes_needed` used the full line time rather than the active width, I wonder if it would solve the issue by giving it a little more time to...
> I also found a mode where glitches look different and fifo_level tuning does not help (something changes a little, but only slightly): You don't say what that mode is....
> > You don't say what that mode is. > > Sorry, 1280x1024@60Hz with RGB24, for example. OK, I may have a quick look when time allows. > > I'm...
Great news that the theory is looking fairly plausible. Per line period on CSI2 you need the pixel data plus 48 bits of header/footer, a line start packet , and...
> That's interesting... I'll check the documentation again, maybe I missed some recommendations about calculating periods. > > By the way, do we really need to calculate the number of...
Revised (but not tested on hardware) version of the function. ``` static unsigned tc358743_num_csi_lanes_needed(struct v4l2_subdev *sd) { struct tc358743_state *state = to_state(sd); struct v4l2_bt_timings *bt = &state->timings.bt; struct tc358743_platform_data *pdata...
The "joys" of 64 bit arithmetic in 32bit kernels. Seeing as the maximum pixel clock the TC358743 supports is around 165MHz, and that fits into a 32bit word, we can...