icarus-verilog topic

An abstraction library for interfacing EDA tools

olofk

SHA256 in (System-) Verilog / Open Source FPGA Miner

unixb0y

HDL support for VS Code

mshr-h

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

dpretet

XCrypto: a cryptographic ISE for RISC-V

scarv

Synthesizable real number library in SystemVerilog, supporting both fixed- and floating-point formats

sgherbst

SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!

dpretet

mirror of https://git.elphel.com/Elphel/vdt-plugin

Elphel

Quickstart guide on Icarus Verilog.

albertxie

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.

stnolting