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An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

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Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.

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The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.

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