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riscv popcount lowering shouldn't call __muldi3/__mulsi3

6

Consider: ``` int a(unsigned x) { return __builtin_popcount(x); } ``` With -march=rv32i, this generates a call to __mulsi3. This is likely to be slow; if we don't have "m", we...

efriedma-quic

missed fold, x fmul C1 > C2 => x > C2

6

https://alive2.llvm.org/ce/z/UmK7vQ https://godbolt.org/z/a6Gqfvxv8 ```llvm define i1 @src(float %0) { %t1 = fmul float %0, 0x3FF0CCCCC0000000 %t2 = fcmp olt float %t1, 0x3FE20418A0000000 ret i1 %t2 } define i1 @tgt(float %0) {...

zhengyang92

[LLDB] Operators <= and >= return a wrong result when comparing with a floating point NaN in expression evaluation

4

Operators `=` are defined through `operator

kuilpd

LLVM ERROR: RV64 target requires an RV64 CPU

2

excuse me, i am new to llvm, but i have some difficulties. how can i convert llvm ir file to riscv64 assembly code? im in x86 platform, using ubuntu 22.04,...

houhuawei23

[Flang][OpenMP] llvm-project/flang/lib/Lower/OpenMP/Clauses.cpp:91: static void Fortran::lower::omp::SymbolAndDesignatorExtractor::verify(const Fortran::lower::omp::SymbolWithDesignator &): Assertion `symbol && "Expecting symbol"' failed.

1

Crash itself is reproducible on Godbolt: https://godbolt.org/z/vsWhM5Wse Reproducer (reduced and modified from https://github.com/gcc-mirror/gcc/blob/master/gcc/testsuite/gfortran.dg/gomp/ref_inquiry.f90) ```console $ cat test.f90 implicit none type t integer :: i end type t type(t) :: x...

k-arrows

[clang-tidy] Improved --verify-config when using literal style in config file

4

Specifying checks using the literal style (|) in the clang-tidy config file is currently supported but was not implemented for the --verify-config options. This means that clang-tidy would work properly...

felix642

Other patterns where clang is not optimal for powi (with fast-math)

4

There have been a few missed-optimization issues with `pow(x, n)` where `n` is an integer. Here, I will provide some other patterns which aren't mentioned in the existing issues. Test...

k-arrows

[SLP]Improve minbitwidth analysis for abs/smin/smax/umin/umax intrinsics.

3

https://alive2.llvm.org/ce/z/ivPZ26 for the abs transformations.

alexey-bataev

[RISC-V][X86] Bitwise NOT is computed twice

8

I have this Zig code: ```zig export fn count_zero_groups(x: u64) u64 { return @popCount(~x & ~(~x

Validark

riscv 64-bit popcount uses inefficient constant materialization

4

Consider: ``` int a(unsigned long long x) { return __builtin_popcountll(x); } ``` Targeting rv64, this generates: ``` a: srli a1, a0, 1 lui a2, 349525 addiw a2, a2, 1365 slli...

efriedma-quic