Robert Jördens

And "stop just before updating sync" is in fact a NOP because after settling comb nothing would happen until the next sync update.

Is the use case of undefined as a special value in simulation to prove that this value does not have an impact on some output? If yes, then aren't there...

There may be no need for x or u at all if all you want is to prove that the actual value 0 or 1 does not matter (in an...

Let's dial it down a bit. You are making a few assumptions that are not true and others need to be checked first. > The wide interface should allow 2.55...

Yes. Without DMA the **sustained** rate is limited by the CPU speed. Just test **bursts** (the ~16 samples I mentioned or whatever fits into an RTIO SED buffer, maybe up...

```python self.vlist = [[0.]*32] * self.n ``` doesn't do what you think it does.

And 2.55 MS/s as well, right? And also the wide interface is not special to fastino. I don't know whether wide rtio was really tested with dma. This is either...

Please elaborate and be thorough and precise. Give yourself some time. I'd have to guess what you mean by "appears to" and "down sampled".

I thought we agreed to test without dma.

Please verify that you can reproduce working max rate bursts with Fastino (again, without DMA and DRTIO). That's the first checkpoint I'm looking for and its a requirement for everything...