Robert Jördens

> Could it be an issue with the CPLD gateware @jordens ? The v1.4 boards in the first post were flashed manually, those in this message by Creotech. Seems unlikely...

Your examples look fine. You may want to have a look at the core analyzer analysis of the slack to see whether that is sufficient. 3µs is marginal. This is...

Ok. But can you explain (3) to me?

And the take home message is that the compiler is unable to infer stuff about attributes of modules? Do we fix it for 4.0?

This is documented: `rf_sw – Initial CPLD RF switch register setting (default: 0x0). Knowledge of this state is not transferred between experiments.` It's a consequence of the configuration register/status register...

It seems better placed in the CPLD documentation. Not every bit of information is copied to every possible location where one might look for it. You can argue that there...

@whitequark Now that we have PCUs, would it be quick to have another stab at trying #667?

* When RAM bound, then the throughput ratio of 4:1 (kc705:kasli) is expected from the data width. * The overall slowdown by a factor of 5 is unexpected. * The...

Hmm. For this now wireshark trace would be very helpful. That would show why and when which connection breaks.

Not much. The wireshark trace should cover some time before the problem start and then a few more minutes after the problem has occurred.