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                                            JEFF LIEU

On Linux Fancy Help Doesn't Work without Help

Hello, I've just tested again in my CentOS Linux and my windows Altera's NIOS Shell (which is a Cygwin) , it seems fine. Actually I'm not entirely sure how this...

MAX1000 SDRAM Controller - 100 MHz and Initialization Refresh Cycles

When you compiled the bit stream, did you have any error in the timing report? I had "pulse width" violation when I use 100MHz clock.

MAX1000 SDRAM Controller - 100 MHz and Initialization Refresh Cycles

Without the DDR flop, there's routing delay between the PLL output and the Pin. And the relationship between the output clock and other signals will change from compilation to compilation...