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Intel staging area for llvm.org contribution. Home for Intel LLVM-based projects.
This PR proposes a new extension for a `wait` that sleeps rather than running CPU full tilt, as has been requested for IoT and similar applications. Because it is fairly...
### Describe the bug Somehow we are generating _Z30__spirv_ImageSampleExplicitLodImDv4_DF16_Dv3_fET0_T_T1_iS4_S4_ with instead of . This can be reproduced with sycl code, exposed by pulldown in https://github.com/intel/llvm/actions/runs/11357226781/job/31590025233 ``` # bin//clang++ -Werror -fsycl...
If a dependent command has all dependencies that has newly added command, the dependent command can be excluded from the execution graph. For in-order queue, all dependent command from current...
__XPTI_INSERT_IF_MSVC is a reserved name. Additionally this macro was only used once, right next to some gcc and clang conditional inclusion of a similar form, so it makes sense to...
### Describe the bug see: https://github.com/intel/llvm/actions/runs/8921355161/job/24501752365?pr=13601 ``` FAIL: SYCL :: syclcompat/memory/memory_async.cpp (2007 of 2020) ******************** TEST 'SYCL :: syclcompat/memory/memory_async.cpp' FAILED ******************** Exit Code: -11 Command Output (stdout): -- # RUN:...
Signed-off-by: chenwei.sun
This PR is a WIP github workflow that benchmarks a given branch using [compute-benchmarks](https://github.com/intel/compute-benchmarks/). It is currently in the midst of a massive overhaul.
This PR includes: * Changes in the program manager methods to be able to properly create/build UR program for multiple devices. So far, we were mostly using only the first...
