fpga-network-stack issues

Which MAC IP/version would work with this toe ?

I have 10G/25G Ethernet Subsytem 3.1 which is integrated with bit older version of toe. I would like to know if this MAC IP would work with this toe/earlier version...

IshtiyaqueShaikh

Can you provide some test cases?

3

Toe's tests(toe_tb) and implementations are mismatched and do not seem to be implemented completely, especially in the case of mode1 and mode 2. When testing the RX side, the test...

Paraoia

Vivado 2018.3 Compatibility

Updated the tcl project script for the VC709 board to be compatible with Vivado version 2018.3. As one of the IP's had changed some minor changes were made to the...

GustavSVJ

test ping failed

2

Hi Dsidler, I use the code you have provided to create a project for a test on board vcu118 . After download the bit , the Ehernet was linked up...

chxibin

Starting guide out of date

1

Hi, The scripts folder have been deleted and the starting guide suggests to run the make_tcp_ip script. But this file does not exists anymore since the June commit. I would...

Robin11111

Can this design be targeted on Alveo u50 xilinx_u50_gen3x16_xdma_5_202210_1 platform?

1

I would like to know if this design can be targeted on Alveo u50 xilinx_u50_gen3x16_xdma_5_202210_1 platform?

lizajoseph

Your fields mask for the computation of the ICRC is wrong. I believe that the ICRC masked fields [these](https://github.com/fpgasystems/fpga-network-stack/blob/master/hls/rocev2/rocev2.cpp#L184-L196) are related to the RoCEv1 specification [1]. In fact here we...

Gabriele-bot

There may be a bug in the txEngMemAccessBreakdown() module?

1

**Bug situation**: In my test, the APP established multiple connections through the TCP interface. When retransmission and address loopback occur, the retransmission data is abnormal. **Expected behavior**: When retransmission and...

LittleBlackLiu