Disconnect3d

Hey, thanks a lot for working on this

Regarding testing, would something like qemu-user emulation be sufficient here? Then we could run e.g. arm32, aarch64, etc binaries and test different cases?

Hmm do we have then some guard code against other architectures than x86/x64?

@lebr0nli Merged, but please look at the comments above :) Thanks again!

Hey, I think that would be awesome, we should work on that :)

Woah, that's pretty neat :D ``` pwndbg> telescope $rsp 10 00:0000│ rbp rsp 0x7fffffffe100 —▸ 0x555555554760 (__libc_csu_init) ◂— push r15 01:0008│ 0x7fffffffe108 —▸ 0x7ffff7a03c87 (__libc_start_main+231) ◂— mov edi, eax 02:0010│...

Here's a patch that adds above result. ```diff diff --git a/pwndbg/commands/telescope.py b/pwndbg/commands/telescope.py index c524705..263eecd 100644 --- a/pwndbg/commands/telescope.py +++ b/pwndbg/commands/telescope.py @@ -38,9 +38,10 @@ parser = argparse.ArgumentParser(description=""" """) parser.add_argument("address", nargs="?", default=None,...

Btw what's the exact CPU? Is that X30 some kind of special register? This can be fixed easily by adding 'x30' here: https://github.com/pwndbg/pwndbg/blob/8cc0ab8b48c8a4d020c4b9215355cdc6f30eb0f3/pwndbg/regs.py#L106-L118

@junknet can you just add it to the regs spec? Also are all other ARM64 having this reg?

@junknet Sure, let's add X30 to the list. But, does it make sense to display X29 separately if it is the same register as SP?