Mike Thompson

Hi @MarioOpenHWGroup. I am not sure if this is already completed, or perhaps is not redundant. Can you comment?

Hi @davideschiavone, I _believe_ this task is a Design, not verification task. I also believe that this task is complete. If that is not the case, please re-open this task.

Hi @szbieg, can you update this issue to specify its completion criteria? As far as I know, much of the work has been completed: - Filenames are renamed to have...

In #67 the following comment was made: > there are still plenty of uses of Ibex throughout the code and documentation.

Hi @LeeHoff, what this the goal of this task?

Given that the CV32E20 has been integrated into the CORE-V-VERIF environment and that ci_check regressions are running under multiple simulators, I would suggest that this task is complete. There is...

Re-assigning to Mario and myself. The completion criteria for this Task: - Integration of CV32E20 into the [cv32e20-dv](https://github.com/openhwgroup/cv32e20-dv) (CORE-V-VERIF) environment. - `ci_check` regressions are running under multiple simulators. - Integration...

Actually, I like the way the E40P did it and would recommend all CVE2-derived cores do the same. This need not increase the gate-count significantly as we don't actually need...

> @MikeOpenHWGroup can you elaborate what you like about it, i fail to see the point. It doesn't implement a CSR in flipflips, but still adds some logic, so it...

> which piece of software does this behavior simplify? The trap handler (one less condition to handle). I've offered my opinion/recommendation, but am not interested in a debate on this...