Scott Mabin

> I think you're forgetting about e-hal drivers. Some LED or button driver will want a gpio pin specifically in the input or output state. Most of our pins implement...

Ah, I see what you mean (sorry it's late here), the pins still need to be put into input or output mode. I guess one level of typestate could be...

This trait has been around since the 0.1 release of the eha, but didn't really need to implement it as embassy-time offers an impl based on the time driver impls....

Maybe we could split this PR into two bits, the inherent infallible methods on the GPIO structs and the eh trait refactoring? Imo the inherent infallible methods we can accept...

Sorry @burrbull, could you also update the tests inside `hil-test`? I will update the CI so we are building these before it gets to the HIL stage :).

One cool thing here is that it is actually possible to mix async and sync tests! Not super useful, but in the case of GPIO where they it can be...

Drafting until https://github.com/esp-rs/esp-pacs/pull/221 as it will fail in the HIL stage.

I think this might actually be an issue, will investigate.

Yeah so @bugadani already warned me about this, and then I subsequently forgot :sweat_smile:. The last pin, pin 30 (31) is used for flash, for chips with embedded flash. When...

Eh, I just simplified the test. Add a changelog for the GPIO API too.